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Syllabus 2022-23 - 13012008 - Fundamentals of Electronics (Fundamentos de electrónica)

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  • Level 1: Tutorial support sessions, materials and exams in this language
  • Level 2: Tutorial support sessions, materials, exams and seminars in this language
  • Level 3: Tutorial support sessions, materials, exams, seminars and regular lectures in this language
DEGREE: Grado en Ingeniería de organización industrial (13012008)
FACULTY: SCHOOL OF ENGINEERING OF JAÉN
DEGREE: Grado en Ingeniería electrónica industrial (13112012)
FACULTY: SCHOOL OF ENGINEERING OF JAÉN
DEGREE: Doble Grado en Ingeniería mecánica e Ingeniería electrónica industrial (13912015)
FACULTY: SCHOOL OF ENGINEERING OF JAÉN
DEGREE: Grado en Ingeniería mecánica (13412009)
FACULTY: SCHOOL OF ENGINEERING OF JAÉN
DEGREE: Doble grado en Ingeniería eléctrica e Ingeniería mecánica (13612012)
FACULTY: SCHOOL OF ENGINEERING OF JAÉN
DEGREE: Doble grado en Ingeniería mecánica e Ingeniería de organización industrial (13812011)
FACULTY: SCHOOL OF ENGINEERING OF JAÉN
DEGREE: Grado en Ingeniería eléctrica (13512010)
FACULTY: SCHOOL OF ENGINEERING OF JAÉN
DEGREE: Doble grado en Ingeniería eléctrica e Ingeniería electrónica industrial (13712015)
FACULTY: SCHOOL OF ENGINEERING OF JAÉN
ACADEMIC YEAR: 2022-23
COURSE: Fundamentals of Electronics
SYLLABUS
1. COURSE BASIC INFORMATION
NAME: Fundamentals of Electronics
CODE: 13012008 (*) ACADEMIC YEAR: 2022-23
LANGUAGE: English LEVEL: 3
ECTS CREDITS: 6.0 YEAR: 2 SEMESTER: SC
2. LECTURER BASIC INFORMATION
NAME: MUÑOZ RODRÍGUEZ, FRANCISCO JOSÉ
DEPARTMENT: U133 - ING. ELECTRÓNICA Y AUTOMATICA
FIELD OF STUDY: 785 - TECNOLOGÍA ELECTRÓNICA
OFFICE NO.: A3 - A3-428 E-MAIL: fjmunoz@ujaen.es P: 953 212810
WEBSITE: -
ORCID: https://orcid.org/0000-0002-0833-0528
LANGUAGE: - LEVEL: 1
NAME: ALMONACID CRUZ, FLORENCIA MARINA
DEPARTMENT: U133 - ING. ELECTRÓNICA Y AUTOMATICA
FIELD OF STUDY: 785 - TECNOLOGÍA ELECTRÓNICA
OFFICE NO.: A3 - 411 E-MAIL: facruz@ujaen.es P: 953212426
WEBSITE: -
ORCID: https://orcid.org/0000-0001-7352-2377
LANGUAGE: - LEVEL: 3
NAME: NIETO NIETO, LUIS MIGUEL
DEPARTMENT: U133 - ING. ELECTRÓNICA Y AUTOMATICA
FIELD OF STUDY: 785 - TECNOLOGÍA ELECTRÓNICA
OFFICE NO.: A3 - 413 E-MAIL: lmnieto2@ujaen.es P: 953212811
WEBSITE: http:\\www4.ujaen.es\~lmnieto2
ORCID: https://orcid.org/0000-0001-8013-9528
LANGUAGE: - LEVEL: 1
NAME: CASA CÁRDENAS, JESÚS DE LA
DEPARTMENT: U133 - ING. ELECTRÓNICA Y AUTOMATICA
FIELD OF STUDY: 785 - TECNOLOGÍA ELECTRÓNICA
OFFICE NO.: A3 - A3-402 E-MAIL: casacar@ujaen.es P: -
WEBSITE: -
ORCID: https://orcid.org/0000-0001-8014-0051
LANGUAGE: - LEVEL: 1
NAME: NOFUENTES GARRIDO, GUSTAVO
DEPARTMENT: U133 - ING. ELECTRÓNICA Y AUTOMATICA
FIELD OF STUDY: 785 - TECNOLOGÍA ELECTRÓNICA
OFFICE NO.: A3 - 438 E-MAIL: gnofuen@ujaen.es P: 953212434
WEBSITE: www.ujaen.es
ORCID: https://orcid.org/0000-0002-5305-3830
LANGUAGE: - LEVEL: 1
3. CONTENT DESCRIPTION

THEORY


Block I. Signals and components.

Signals. Components of a circuit: Voltage and Current Sources, Resistor, Capacitors, Inductors, Transformers. Other components. Theorems for circuit analysis


Block II. Semiconductors Diode and Bipolar Transistor.

Introduction. Semiconductor: definition. Silicon. Types of  carriers in semiconductors. Band Theory. Types of semiconductors: Intrinsic and extrinsic semiconductor. PN junction: Forward bias and Reverse bias. Diode. IV characteristic of a diode. Electrical characteristics of a diode. Ideal diode. Circuits with diodes. Other diode parameters. Diode datasheet. Special diodes. Transistor. Components based on semiconductors.


Block III. Operational Amplifier

Amplification. Voltage amplifier model. Cascaded amplifiers. Introduction to the differential amplifier. Operational Amplifier (OA). The ideal OA. Linear circuits with OA. The real OA.


Block IV. Digital Electronics.

Introduction (reminder note): Signals and systems. Digital signal vs. Analog signal. Information Representation. Need and justification. Representation of NATURAL number. Representation of INTEGER number. Representation of REAL number. Binary Codes. Boolean Algebra: Introduction. Properties and Theorems. Logic Gates. Combinational Functions. Definition. Truth Tables. Canonical Forms: Definition. Definition of minterm and maxterm. Minterm Canonical Form. Maxterm Canonical Form. Implementation with NAND gates. Implementation with NOR gates.  Simplification of logic functions. Veitch-Karnaugh (V-K) maps. Simplification using V-K maps. Combinational circuits design. Introduction to Sequential Systems: Counters.


PRACTICES


Practical Block I. Instrumentation.

Usage of basic electronic instruments: digital multimeter, power supply, function generator and oscilloscope. Measurement of shift between voltages in an R-C circuit.


Practical Block II. Analog Electronics.

Identification and characterisation of different diode types. Design, assembly and measurement of half-wave and full-wave rectifiers. Design, assembly and measurement of inverter amplifier based on operational amplifier. Design, assembly and measurement of a non-inverter amplifier based on operational amplifier. Experimental measurement of slew rate.


Practical Block III. Digital Electronics.

Identification and function checking of integrated circuits containing logic gates AND, OR and NAND.  Design, assembly and truth table verification of combinational functions built with the 7400 integrated circuit (NAND gates)

The practices will also include three reports to prepare at home, following the philosophy of "Digital twin". In these home practices, the student should be conducted the design and simulation of several circuits (using a free software, intuitive and easy to use) according to certain specifications. The assembly of these circuits will be addressed later in the Laboratory in the corresponding practice sessions. The aim is the student can compare the experimental results obtained in the lab with the simulated ones.

In particular, the three home practices will be:

  1. a) Design and simulation of a full wave rectifier with and without capacitor using Falstad (free online simulator of electronic circuits).
  2. b) Design and simulation of an inverting amplifier based on an operational amplifier using Falstad.
  3. c) Design and simulation of combinational Boolean functions with 7400 integrated circuits (NAND gates) using CEDAR Logic (free digital circuit simulator)

4. COURSE DESCRIPTION AND TEACHING METHODOLOGY

The theoretical contents that are taught in the lectures will be consolidated by performing laboratory practices and simulations of electronic circuits.

Within the methodologies and activities denoted A3 and M18, the resolution of four exercises in English will be proposed with the aim of promote the active participation of the student. In this way, the development of the competence of working in a multilingual environment (CT1) is promoted with the preparation and individual presentation of works in English.

Within the methodologies and activities called A2R and M6R, the development of three home practices will be included,

Students with special educational needs should contact the Student Attention Service (Servicio de Atención y Ayudas al Estudiante) in order to receive the appropriate academic support

5. ASSESSMENT METHODOLOGY

The assessment methodology will be:

S1) Aspect: Attendance and / or participation in face-to-face and/or virtual activities in English. Instrument: Control of the level of active participation in class (5% of the final mark)

S2) Aspect: Theoretical concepts of the subject. Instrument: Exam of contents (45% of the final mark)

S3) Aspect: Carrying out work, cases or exercises. Instrument: Continuous evaluation of three Practical Reports to be conducted at home following the philosophy of "Digital twin", in the terms described in cell B4. (15% of the final mark)

S4) Aspect: Laboratory / field practices / use of ICT tools. Instrument: Control of the level of fulfilment of the activities (35% of the final grade)

 

S1. Attendance and participation. The involvement of the student in the development of the classes where they demonstrate the daily work in order to acquire the necessary skills will be valued. The resolution of exercises in English will be especially valued in this section.

S2. Theoretical concepts of the subject. The theoretical contents and their application to solve problems will be evaluated through an exam in the official date.

S3. Carrying out work, cases and exercises. The student's learning progress will be evaluated through continuous evaluation of their ability to project and design electronic circuits with the help of simulations.

S4. Laboratory practices. The student's ability to design and develop electronic circuits will be evaluated through practical assemblies and simulation of electronic circuits.

 

Aspects S1 and S3 will be evaluated by carrying out and delivering, periodically, theoretical-practical activities.

It will be necessary to obtain a positive evaluation in S2 and S4 (that is: greater than or equal to 5 points out of 10) to be able to pass the subject.

With this system, the skills CB2, CC5, CT4 and CT6 will be evaluated.

The positive evaluation of the student will imply that they have achieved the learning outcomes Resul-34, Resul-35, Resul-36 and Resul-37.

 

In compliance with article 13 of the Regulations for the Academic Regime and Student Assessment of the University of Jaén, any student who justify (according to the assumptions contained in the aforementioned article) that cannot participate in regulated or complementary face-to-face activities proposed in the subject, they have the option to demonstrate the necessary knowledge to obtain the highest grade. To this end, a single test evaluation procedure will be used both in the ordinary and extraordinary call.

6. BOOKLIST
MAIN BOOKLIST:
  • Diseño digital: principios y prácticas. Edition: -. Author: Wakerly, John F.. Publisher: México [etc.]: Prentice-Hall Hispanoamericana, cop. 1992  (Library)
  • Electrónica. Edition: 2ª ed. Author: Hambley, Allan R.. Publisher: Madrid [etc.]: Pearson: Prentice Hall, 2008  (Library)
  • Microelectronic circuits. Edition: International 7th ed. Author: Sedra, Adel S.. Publisher: New York [etc.] : Oxford University Press, cop. 2016  (Library)
  • Digital fundamentals. Edition: 5ª ed. Author: Floyd, Thomas L.. Publisher: New York [etc.]: Macmillan, cop. 1994  (Library)
  • Digital design : principles and practices John F. Wakerly. Edition: 5th. ed. with Verilog. Author: Wakerly, John F. autor. Publisher: Pearson  (Library)
  • Microelectronic circuits Adel S. Sedra, Kenneth C. Smith. Edition: 6th ed. Author: Sedra, Adel S.. Publisher: Oxford University Press, ;  (Library)
  • Electronics. Edition: -. Author: Hambley. Publisher: Pearson  (Library)
ADDITIONAL BOOKLIST:
  • Principios de electrónica. Edition: 7ª ed.. Author: Malvino, Albert Paul. Publisher: Madrid [etc.]: McGraw-Hill, D.L. 2010  (Library)
  • Circuitos eléctricos. Edition: 3ª ed. Author: Edminister, Joseph A.. Publisher: Madrid [etc.]: McGraw-Hill, D.L. 2003  (Library)
8. VIRTUAL / CLASSROOM TEACHING SCENARIO

COURSE DESCRIPTION AND TEACHING METHODOLOGY

Training activities

Format (classroom / online) *

Teaching methodology Description

A1 Lectures in large group

Classroom lessons (rotatory 50%) (*)

Classes in the schedule and classroom assigned to one part of the group, videoconference broadcast to the rest. Students will rotate periodically as determined by the Center.

26 sessions of master classes, one hour each, on the contents of the program.

A1 Lectures in large group

Classroom lessons (rotatory 50%) (*)

Classes in the schedule and classroom assigned to one part of the group, videoconference broadcast to the rest. Students will rotate periodically as determined by the Centre.

4 sessions for solving problems/exercises, one hour each. The resolution of problems and exercises improves the capacity for analysis and synthesis.

A2  Lectures in small group

Classroom lessons (rotatory 50%)  (**)

7 practice sessions, two hours each, in specialized laboratories

A2 Lectures in small group

Online

7 online asynchronous practical sessions, two hours each, developed with an electronic simulation software

Tutorials

Face-to-face + Online

Some sessions will be face-to-face and others online (synchronous and asynchronous)

(*) This percentage could be changed by the Centre depending on the number of students and the capacity of the classroom/lab

(**) The Center may establish rotating attendance depending on the number of students and capacity of the classroom / laboratory according to sanitary measures (class in the schedule and classroom / laboratory assigned to one part of the group and videoconference broadcast to the rest, with periodic rotation of students, as determined by the Center).

 RESOURCES

"Google Suite" and / or ILIAS Platform are incorporated.

"Google Meet" is incorporated for videoconferences.

"Google Forms" is incorporated for virtual tests.

Electronic books available in the library are incorporated.

ASSESMENT

Ordinary Call

Assesment Method

Format (classroom / online) *

Description

Percentage

Final Exam Theory

Presential/ Synchronous Online

Theoretical concepts about subject

45%

Continuous evaluation of the theory. Proposed Exercises.

Asynchronous Online

Resolution and delivery of proposed exercises

5%

Assessment of presencial practices

Face to face practices assesment: Presential practices

Preparation and delivery of the reports of practices

25%

Assessment of online practices

Asynchronous Online

Preparation and delivery of the reports of practices

25%

 

Extraordinary Call

Assesment Method

Format (classroom / online) *

Description

Percentage

Final Exam Theory

Presential/  Synchronous Online

Theoretical concepts about subject

45%

Continuous evaluation of the theory. Proposed Exercises.

Asynchronous Online

Resolution and delivery of proposed exercises

5%

Assessment of presencial practices

Face to face practices assesment: Presential practices

Preparation and delivery of the reports of practices

25%

Assessment of online practices

Asynchronous Online

Preparation and delivery of the reports of practices

25%

The evaluation system corresponds to the one indicated in the Face-to-Face Mode

 

9. VIRTUAL TEACHING SCENARIO

COURSE DESCRIPTION AND TEACHING METHODOLOGY  

Training activities

Format (classroom / online) *

Teaching methodology Description

A1 Lectures in large group

Online

26 online sessions of master classes, one hour each, on the contents of the program.

 

A2 Lectures in small group

Online

14 online synchronous practical sessions, two hours each, developed with an electronic simulation software

A1 Lectures in large group

Online

4 online sessions for solving problems/exercises, one hour each.

Tutorials

Online

Some sessions will be face-to-face and others online (synchronous and asynchronous)

RESOURCES

"Google Suite" and / or ILIAS Platform are incorporated.

"Google Meet" is incorporated for videoconferences.

"Google Forms" is incorporated for virtual tests.

Electronic books available in the library are incorporated.

ASSESMENT

Ordinary Call

Assesment Method

Format (classroom / online) *

Description

Percentage

Final Exam Theory

Synchronous Online

Theoretical concepts about subject

45%

Continuous evaluation of the theory. Proposed Exercises.

Asynchronous Online

Resolution and delivery of proposed exercises

5%

Assessment of  practices

Asynchronous Online

Preparation and delivery of the reports of practices

50%

 

Extraordinary Call

Assesment Method

Format (classroom / online) *

Description

Percentage

Final Exam Theory

Synchronous Online

Theoretical concepts about subject

45%

Continuous evaluation of the theory. Proposed Exercises.

Asynchronous Online

Resolution and delivery of proposed exercises

5%

Assessment of  practices

Asynchronous Online

Preparation and delivery of the reports of practices

50%

The evaluation system corresponds to the one indicated in the Face-to-Face Mode

 

DATA PROTECTION CLAUSE (on line exams)

Institution in charge of data processing: Universidad de Jaén, Campus Las Lagunillas, s/n, 23071 Jaén

Data Protection Delegate: dpo@ujaen.es

Purpose: In accordance with the Universities Law and other national and regional regulations in force, carrying out exams and assessment tests corresponding to the courses students are registered in. In order to avoid frauds while sitting the exam, the exam will be answered using a videoconference system, being able the academic staff of the University of Jaén to compare and contrast the image of the person who is answering the exam with the student's photographic files. Likewise, in order to provide the exam with evidential content for revisions or claims, in accordance with current regulation frameworks, the exam will be recorded and stored.

Legitimacy: compliance with legal obligations (Universities Law) and other national and regional regulations currently in force.

Addressees: service providers who are the owners of the platforms where the exams are carried out and with whom the University of Jaén has signed the corresponding data access contracts.

Storage periods: those established in current in force regulations. In the specific case of exam videoconference recordings, not before the examination records and transcripts are closed or the exam can still be reviewed or challenged.

Rights: you can exercise your right of access, amendment, cancellation, opposition, suppression, limitation and portability by sending a letter to the postal or electronic address indicated above. In the event that you consider that your rights have been violated, you may submit a complaint to the Andalusian Council for Transparency and Data Protection www.ctpdandalucia.es

CLASS RECORDING CLAUSE PERSONAL DATA PROTECTION

Person in charge: Universidad de Jaén, Paraje Las Lagunillas, s/n; Tel.953 212121; www.ujaen.es

Data protection delegate (DPO): TELEFÓNICA, S.A.U. ; Email: dpo@ujaen.es

Procedure aim: To manage proper recordings of teaching sessions with the aim of facilitating learning process under a multimodal and/or online teaching

Period for record storage: Images will be kept during legal term according to regulations in force

Legitimacy: Data will be managed according to legal regulations (Organic Law 6/2001, December 21, on Universities) and given consent provided by selecting corresponding box in legal admission documents

Data recipients (transfers or assignments): Any person allowed to get access to every teaching modality

Rights: You may exercise your rights of access, rectification, cancellation, portability, limitation of processing, deletion or, where appropriate, opposition. To exercise these rights, you must submit a written request to the Information, Registration and Electronic Administration Service of the University of Jaen at the address above, or by e-mail to the address above. You must specify which of these rights you are requesting to be satisfied and, at the same time, you must attach a photocopy of your ID card or equivalent identification document. In case you act through a representative, legal or voluntary, you must also provide a document that proves this representation and identification. Likewise, if you consider that your right to personal data protection has been violated, you may file a complaint with the Andalusian Data Protection and Transparency Council www.ctpdandalucia.es